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Lightweight Root of Trust IP

Secure boot, attestation and device identity for area-constrained SoCs. TCG BIT (MARS) aligned. Optimised for the smallest silicon footprint in its class.

Inside you'll find:

Full internal block diagram and integration guide
Environmental and statistical performance across temperature range
Performance metrics

Architecture Summary

QRoot Lite Technical Highlights

<25K gate ASIC footprint, a fraction of full RoT subsystems

128-bit security strength

Hash performance data in product brief

APB/AXI, SPI & UART interfaces (customisable for your SoC)

IJTAG support

The Problem

Full RoT Subsystems Don't Fit Constrained SoCs

Most root of trust solutions assume you have silicon area to burn. If you're designing a constrained IoT, edge or automotive ECU, a heavyweight RoT blows your gate budget before you've added application logic. And bolting on an external TPM adds cost, board space and a new attack surface.

The Solution

QRoot Lite: Security without Silicon Overhead

Lightweight Root of Trust IP, with direct engineering support included.

Delivers secure boot, measured attestation, sealed storage and key management in under 25,000 gates. Immutable hardware design, side-channel protected by design, and built to the TCG BIT (MARS) specification.

Integration guidance and compliance documentation included.

From security architecture to tape-out, expert support through every stage of silicon development including system certification.

Ultra-Small Footprint

Designed from the ground up for area-constrained SoCs, MCUs, sensor nodes and chiplets. No bloat, no compromise.

Ascon Lightweight Crypto

Co-designed with TCG BIT. NIST lightweight cryptography standard, purpose-built for constrained environments.

Immutable & Side-Channel Protected

Hardware-based measurement and attestation that can't be modified by software. Side-channel resistance built into the architecture.

Use Cases

Built For Security-Critical Silicon

Proven silicon IP and embedded software, built for real world scenarios.

Constrained SoCs & IoT

Designs where every gate matters. Automotive sensor ECUs, industrial endpoints, low-power MCUs.

Physical AI & Next-Generation Designs

Edge inference accelerators and quantum-resilient roadmaps where security is part of the architecture, not bolted on.

Custom SoCs & Chiplets

Application-specific silicon and heterogeneous packaging needing authenticated boot, secure DFT and provisioning.

Evaluate

Evaluate Our QRoot Lite Architecture

Full specifications, block diagrams, and performance data in the product brief.