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PUF IPs For Your SoC: Unique Device Identity

Hardware root keys without key injection. Digital and analog PUF options. Optimised for small silicon footprint.

Inside you'll find:

  • Full internal block diagram and hardware integration guide
  • Environmental and statistical performance across temperature range
  • Performance metrics

Your email is used only to send the product brief and follow up on your enquiry. We never share your information.

Architecture Summary

PUF IP Technical Highlights

Digital or analog implementation options
Customisable seed length and number (128/256)
Designed and deployed for millions of area-constrained SoCs, from low-gate to high-security, mission-critical applications
Quantum derived entropy (Analog PUF) or logic-based, all-CMOS, no flash or eFuse (Digital PUF)
Customisable interface (APB / AXI)
Optimised for use in open source RoTs (Caliptra / OpenTitan)

The Problem

Key Injection Doesn't Scale

Factory provisioning is expensive, slow, and a supply chain risk. Every device that leaves the line with an injected key is a device that could have been compromised during manufacturing. And once keys are stored in non-volatile memory, they're a target.

The Solution

Keys Born in Silicon

Digital and analog PUF IP, with direct engineering support included.

A PUF extracts a unique cryptographic fingerprint from your chip's physical structure. No secrets stored, no injection needed.
Integration guidance and compliance documentation included.
From security architecture to tape-out, expert support through every stage of silicon development including system certification.
Digital PUF

Logic-based and lightweight. Pure digital: no flash, no eFuse, no analogue primitive, built entirely from standard CMOS logic cells. Best for area- and cost-constrained SoCs. Agile to implement, easy to verify, drops into any process node.

Download the brief
QDID PUF (Analog)

Quantum-tunnelling entropy generated from the silicon itself. Much harder to attack, more reliable across temperature, ageing and process corners, at the cost of more area. Best for high-assurance designs (automotive, defence, secure elements). Proven on TSMC, GlobalFoundries and UMC.

Download the brief

Use Cases

Built For Security-Critical Silicon

Proven silicon IP and embedded software, built for real world scenarios.

Constrained SoCs & IoT
Designs where every gate matters. Automotive sensor ECUs, industrial endpoints, low-power MCUs.
Physical AI & Next-Generation Designs
Edge inference accelerators and quantum-resilient roadmaps where security is part of the architecture, not bolted on.
Custom SoCs & Chiplets
Application-specific silicon and heterogeneous packaging needing authenticated boot, secure DFT and provisioning.

Proof

Trusted By Teams Designing Secure Silicon

Silicon-proven across multiple process nodes.

Siemens
Würth Elektronik
Renesas
Microchip
STMicroelectronics
Trusted Computing Group
Intelpro

Evaluate

Evaluate Our Digital & Analog PUF IP Architecture

Full PUF specifications, architecture diagrams and performance data in the product brief.

Inside you'll find:

  • Full internal block diagram and hardware integration guide
  • Environmental and statistical performance across temperature range
  • Performance metrics

Your email is used only to send the product brief and follow up on your enquiry. We never share your information.